The hardware is built on two seperate boards. One is called the "core" board, the other is called the
"I/O" board.
The core board contains the microprocessor with its RAM/EPROM, the serial link and a 16-bit parallel interface.
The I/O board contains decode logic for all the seperate I/O lines to LEDs, switches and buttons (and knobs).
At this moment (November, 2003) the core board is finished [hardware-wise, second design]. The core board has a
connector for the serial port and a connector for the parallel port and a connector for the +5V. power supply (not
on this picture).
The serial port connects to the PC that runs the (PDP-11) simulator or a VT220 debugging console (or hyperterm). The
parallel port connects to the I/O interface board.
In the top left corner you see the reset button. Next to this button are the CPU and the monitor EPROM socket. On the
'next' line are the 74LS00, and the two 74LS138 for respectively I/O and RAM/ROM address decode. Next to these three
sockets is the optional second EPROM socket.
Below these are the sockets for the NE556 dual timer, the PIA and the optional extra RAM socket. On the last line are
the two 74LS245 buffers and the ACIA with next to it the Dallas DS275 RS-232 chip. Above this chip is a small button
that, pressed while resetting the core board, does not start the console application but a small monitor for debug and
test purposes.
I built the core board on a "euro sized" board, 10 x 16 cm, using good quality sockets for all IC's. Wiring all
components is done with 0,3 mm isolated copper wire, found in transformers etc. You need a soldering iron with a
sufficient hot tip to burn the isolation of the wire with the aid of a little solder. Doing so also gives the wire a
nice pre-soldered end. Solder that end to a pin of the IC socket and then, with tweezers and a small screwdriver to
bend the wire, you bring the wire to the endpoint of for example an other IC socket. Again, burn the isolation, etc.
See the picture for the tools I used, and the end-result after some 10 hours soldering in one week time ...
This detail image shows a part of the wiring from the 6802 CPU to the monitor EPROM socket.
If your fingers start itching and you are dieing to start building your own core board, here is the detailed schematic
diagram of the
The I/O board is a separate board to make the core board generic: the core board can be used for other
applications as well.
The I/O board only contains two decoders (74154's) and octal latches for input of the switches,
the toggle buttons and the knobs (11/45, 11/50 and 11/70 console) and buffered outputs to the LEDs.
If you know what console you want to implement, you could integrate the decoders and the needed octals latches on
one board together with the core electronics.
The "ADDRS" lines select one of the two 74154's, enables the selected demultiplexer and activates one of the 16 output
lines of the demux. For the input latches, the output lines of the "input 74154" are connected to the OE* pin of the
octal latches so that, when activated, the input data of the selected latch is on the "DATA" lines. All other input
latches remain in 3-state.
For the output latches, the output lines of the "output 74154" are connected to the CP pin of the octal latches so that, when activated, the data on the "DATA" lines is latched by the selected latch.
The original design used 74LS373's for the input port and the output ports. However, as the
outputs of the 74154 are active low, this would mean that all output latches would be in the transparant state
and, when selected, they would latch the data.
For a correct operation this should be reversed. One solution is to
implement inverters in the E selection lines from the 74154 to the 74LS373 output latches (if you have plenty
373's), or simply replace the 74LS373 output latches with 74LS374's. The 374 latches have an edge-sensitive
latch input called CP. When the output port selection from the 74154 becomes invalid (transition from low -> high) the
data is latched in the 74LS374.
The "DATA" and "ADDRS" (each 8 wires) are connected to the two 74LS245 bi-directional buffers on the core board. The
74LS245's protect the 6821 PIA and enable many octal latches to be connected to the "DATA" lines. Of the 74LS245 that
drives the "ADDRS" lines are only 6 wires used, so two are available for other purposes. I am thinking of using 1 line
to drive a beeper to signal errors. The 74LS245 that buffers the "DATA" lines switches I/O data direction under software
control.
As you can see, I soldered a few more input and output latches than necessary for the 11/40 console.
The 11/40 console could be implemented with just 5 octal latches for output ports and 3 octal latches for input ports.
An extra input port could be used if you want to use some optional stuff built in the software like a selectable
blinkenlight pattern (for example the RSX or RSTS/E idle patterns) on the DATA LEDs when the PC does not run the
simulation software and you want to see "something" on the LEDs. However, I have choosen to read the switches 7 thru 0
at start-up time and use their setting for the blinkenlight pattern in stand-alone mode.
Here is the detailed schematic diagram :
| I/O board (765 kBytes, ZIPped PDF file) | The I/O board. |