11/34 KK11-A |
M8268 |
- CACHE module
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To see a larger image with the location of the switches, click on the image of the board. |
The M8268 has no jumpers, however, you must cut the "cache hit line" on the DD11-PK backplane. The two switches on the
M8268 board are called "Force Miss" switches.
When you install a KK11-A in an existing PDP-11/34A, you must do some
power calculations to avoid overloading the +5 Volt power supply. See the installation paragraph for details.
INTRODUCTION
The KK11-A is a cache memory option for the PDP-11/34A's KD11-EA processor.
The cache is a small, high speed memory that maintains a copy of previously selected portions of main memory (MOS or core).
The cache memory is designed to decrease central processing unit to memory read access time.
I read "somewhere" that the KK11-A was not such a big score, because *all* instructions get lengthened by several tens of
microseconds. Only if you have a hit you gain performance, well that's usual the case with cache :-) , but "bad" programs
(that experience lots of misses) will actually perform worse when the KK11-A is installed, because of the extra delay on all
instructions.
- Lyle Bickley has the definitive answer, he says the following.
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Yes, I heard that rumor too. But when I studied DEC's own research on cache for PDP-11's - I concluded that the rumors were false.
It is kinda sad - but I held off implementing cache for a couple of years because I believed the rumors - as opposed to researching and
finally benchmarking cache versus non-cache. You can read all about it in "Computer Engineering", Bell, Mudge and McNamara,
© 1978, in Chapter 10 "Cache Memories for PDP-11 Family Computers".
The KK11-A is implemented on a hex multi-layer module (M8268).
It contains 1024-word high speed random access memory, organized as a direct mapped cache with write-through, compatible
with the PDP-11/34A.
The M8268 module interfaces to the KD11-EA (M8265 module) via a 40-pin over-the-top connector H8821 or H8822.
Power requirements for the M8268 is 4 Amps. maximum at +5 Vdc.
Note: the KK11-A cannot be used with an PDP-11/34 (M7265/M7266).
Architecture
Cache operates as an associative memory in parallel with the UNIBUS main memory but with its own high-speed data path (AMUX
lines that are also used by the FP11-A floating point processor option). Cache reads by the CPU result in data being transmitted
over the AMUX lines.
Read misses (desired data is not present in the cache) and write hits (bus address and cache location match)
which result in cache updates are accomplished by the cache capturing the data from the UNIBUS as the CPU/main memory transaction
occurs. Direct memory access (DMA) transfers to memory are also monitored by the cache.
Performance
I received the following information from Lyle Bickley.
Lyle has done extensive benchmarks with and without the cache option installed in the 11/34 and he found that cache can make
significant performance enhancements. Lyle says that he was surprised that cache helped performance as much as it did in his
PDP-11/34 considering that his machine uses fast MOS (MS11-L) memory - and the cache was designed as a "kicker" for much slower
memory.
Here is a brief summary of his findings of cache speed enhancement.
- Large FORTRAN compiles and MACRO assemblies run on average 44% faster.
- Large LINKs run 56% faster.
- Integer benchmarks like HANOI run 57% faster.
- Floating point benchmarks like single precision Whetstone run 19.4% faster and double precision Whetstone runs 16.9% faster.
The performance gain depends on what program the machine executes. For example, when the Operating System that the machine runs
is RSTS instead of RT11, the performance gain will not be as much because of time-sharing. The run environment changes with
time-sharing every time slice, the cache memory is rather small and needs to be refilled on each time slice.
AVAILABLE DOCUMENTION
- KK11-A cache memory technical manual (EK-KK11A-TM-001)
THE 'OVER-THE-TOP' CONNECTOR
When you install the Cache option (M8268), you must also install a so-called "over-the-top" connector.
The OTT connector connects the KK11-A module to the data paths module of the processor.
The Over The Top connector is either the H8821 or the H8822. This depends on the configuration of the system.
If you only have the KK11-A installed you need the H8821 to connect the KK11-A to the data paths module of the processor.
If you have the FP11-A Floating Point Processor option also installed (which also requires a connection to the data
paths module of the processor), you need the H8822.
Note the arrows on the solder side of the connectors. These arrows must point toward the first slot. However, as you
can see in the other picture, the connectors are keyed so you can install the connector only in the correct way.
KK11-A INSTALLATION
Before installing the KK11-A option, run the following diagnostics. When you have a problem after the installation of
the cache memory option, you know that the problem is caused by the addition of the KK11-A.
Note that you cannot install the KK11-A option in a PDP-11/34.
- «-» FKAA 11/34 CPU test
- «-» FKAB 11/34 Traps test (at least Rev. C)
- «-» FKAC 11/34 EIS test
- «-» DZQMC 0-124K memory exerciser
The installation of the KK11-A requires these components: M8268 (that is obvious...), and an H8821 (or H8822) 20-pin
over-the-top connector. You need the H8822 over-the-top connector instead of the H8821 if you also have the FP11-A
floating point processor in the system.
Before you proceed with the actual installation, first calculate the current drain on the +5 Volt power supply for the
DD11-PK CPU backplane. For an example of the power requirement calculation, see the "floating point" page for the 11/34,
the "FP11-A installation" paragraph.
Available diagnostics for the PDP-11/34(A) KK11-A Cache Memory option
«-»
|     FKKA(x) |     11/34 Cache test |
The (x) represents the revision level.